Community
Michael Lynch - Alumni
Current Status
Michael is currently an Analog/Mixed Signal IP Designer with Synopsys in its Mississauga Ontario Design Center.
Research Interests
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Radio Frequency Integrated Circuits (RFICs)
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Fabrication processes for RFICs (SiGe HBTs, Silicon BJT, Standard CMOS,
GaAs MESFETS)
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RF System Planning for RFICs
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Direct Conversion Receiver Architectures
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Layout of circuits and structures for RFICs
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10+GHz integrated circuits, devices, and techniques
Thesis Topic
Researchers at TRLabs have
developed a wireless network capable of Gigabit per second data rates.
ATIPS-RFIC group members are creating 17GHz RFIC components
for the terminal node receiver.
My thesis outlines system planning issues for the receiver, as well
as the design and implementation of a 17.35GHz LNA and 17.35GHz direct-downconversion
mixer.
My supervisor is Dr. J.W.
Haslett
Education
| Master of Science in Electrical Engineering |
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| September 2000 - February 2003 |
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Calgary Alberta, Canada
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| Honours Co-op Bachelor of Applied Science in
Electrical Engineering |
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| September 1995 - May 2000 |
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Waterloo Ontario, Canada
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Awards
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Government of Alberta iCORE Graduate Student Fellowship
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NSERC Post-Graduate Scholarship
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TRLabs Graduate Student Fellowship
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NSERC Undergraduate Student Research Award
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Two Waterloo Engineering Upper Year Scholarships
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Governor General's Bronze Medal
Research Experience
I was an undergraduate research assistant at the University of Waterloo
with the following groups:
Work Experience
I have held the following positions in industry:
Support
Acknowledgements go to NSERC, iCORE and TRLabs for their support of my
research.
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